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In this article,you are going to learn about the input offset current of Opamp, this issue is one of main non linearities of Opamp.Because of this non linearity issue system gets some error,so here we are going discuss about how to reduces it.so, thanks to came here . At the end of the session you will get some knowledge about how to reduce practically this bias current.
Definition of input bias current
Ideally ,there is no current flow into the input terminal of opamp without giving any input voltage ,which means that both inputs are grounded(both inverting and non inverting input of opamp).But practically there are some input current flowing into the opamp due to fabrication of internal transistors and temperature.which is called input bias current IB+ and IB- .
Difference between that input bias current( IB+ and IB-) is called input offsert current.which is shown in below figure (a)..
figure (a): Op Amp Input Bias Current
IB = Input bias current.
| IB+ - IB- | = IOS
IOS = Input offset current
1] IB can vary from fA to μA,
depending on the device.
2]Some structures IB varies little with temperature.
Because of this input offset current system produces the some unnecessary
small amount of output voltage which add to
system errors.
Finding the practically error output voltage of opamp
from the figure (b) 1]we need to find the output voltage without giving any input voltage.
2]Both inputs were grounded.
IR1 = 0A
IR2 = Vo - 0 / R2
Vo = IR2 x R2
also IR2 = IB- so, Vo =IB- x R2
so,this is the practical error output voltage of opamp .here if you see the output voltage equation Vo is directly propotional to the R2. so,here we can easily cancel out the input offset current by adding a extenal compensation resistor in the non inverting input terminal of opamp
Canceling the effect of bias current (External to opamp)
Figure (C): Canceling the Effects of Input Bias Current within an Application
from figure (c)
R3 = compensation resistor.
IR3 = IB+
When the bias currents of an op amp are well matched , a bias compensation
resistor, R3 introduces a voltage drop in the non-inverting input to match and thus
compensate the drop in the parallel combination of R1 and R2 in the inverting input. This
minimizes additional offset voltage error, as in figure (c) . Also note that this form of bias
cancellation is useless where bias currents are not well-matched, and will, in fact, make matters
worse.
R3 = R1 || R2
Vo = R2 | IB+ - IB- |
Vo = R2 x IOS
Vo = 0 if ( IB+ = IB-)
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